## Mapping Model

The mapping model is intended to provide tools that use hardware and software models (e.g. code generators) information about the corresponding mappings and allocations. This information contains associations between

- schedulers and executable software: A scheduler manages and distributes executable software like runnables or tasks on its managed processing units
- schedulers and processing units: A scheduler can manage one or more processing units and deploy computations on these
- data and memories: Data (such as functions, variables, heap etc) is mapped on static and volatile memories

Note the mapping model is the only sub model of Amalthea with an attribute in the root element. The Address Mapping Type defines the interpretation of used addresses in the mapping model. Additional information can be found in the MemoryMapping section.

### Overview

The Meta Model specifying the Mapping Model is shown below.

#### MappingModel

The MappingModel serves as a container for each of the mapping rules, i.e. Allocations (executable software and processing units which are allocated to schedulers) and Mappings (labels and software which is mapped to memories).

### Allocations

#### SchedulerAllocation

The SchedulerAllocation describes the allocation of a Scheduler to processing units. This class consists of references to the respective Scheduler, which is specified within an existing OS model, and a processing units, which is specified in a hardware model. Schedulers with algorithm “Grouping” are not allocated since they take no decisions and produce no overhead.

Name | Description
--- | ---
scheduler | The scheduler (that is specified in more detail).

responsibility

Defines the processing units the scheduler is responsible for. On these units the scheduler takes decisions. Multiple schedulers can be responsible for one processing unit because of hierarchies. Child-schedulers only take decisions, if they parent-schedulers allows them to (e.g. hypervisors with virtual machines which execute an own operating system). Tasks allocated to this scheduler execute on the intersection between affinity and the responsibility of the scheduler. If this is null the configuration is invalid. If the intersection results in multiple cores, the task can migrate.

executingPU | Defines on which processing unit the scheduling algorithm is actually executed to consider the overhead.

#### RunnableAllocation

The RunnableAllocation is used to associate a Runnable, specified within an existing software model, with a Scheduler.

#### TaskAllocation

The TaskAllocation is used to associate a Task with its TaskScheduler.

Name | Description
--- | ---
task | The task (that is specified in more detail).
scheduler | Specifies the unique allocation to the scheduler of the task.

affinity

Specifies the possible processing units the task can run. If only one unit is specified, the task runs on this core. If multiple cores are specified, the task can migrate between the units. The task executes on the intersection between affinity and the responsibility of the scheduler. If this is null the configuration is invalid. If the intersection results in multiple cores, the task can migrate.

schedulingParameters | Used to assign scheduling parameters for this specific allocation. For details see chapter “Scheduling Parameters” in OS Model.
parameterExtensions

#### ISRAllocation

The ISRAllocation is used to associate an ISR with an InterruptConroller. The attribute ‘priority’ can be used to assign a value for this specific allocation.

### Mappings

#### MemoryMapping

The MemoryMapping is a class, describing the mapping of parts of the software model to Memory. It is used to associate specializations of the AbstractMemoryElement (i.e. Label, Runnable, TaskPrototype and Process). The target memory is specified by a reference to an explicit Memory within an existing hardware model. The position in memory can also be defined as address here. If the address is a absolute memory address, a offset address from the memories first address, or if the address information is not expected at all is defined by the Memory Address Mapping Type enumeration in the root element of the Mapping Model. The Additional attributes, e.g. to supply further information for a code generator, may be described by the containment attributeList.

#### PhysicalSectionMapping

The PhysicalSectionMapping class (can also be called as Physical Memory Section ) describes the following:

- mapping of various Section elements to a specific Memory
- mapping various Label and Runnable elements to a Physical Memory Section
- description of memory address location where the Physical Memory Section is allocated

Note for additional information (see User Guide > Concepts > Memory Sections)